Anti-fuses and fuses are commonly used in the semiconductor industry for one-time programming purposes. Typically, fuses and anti-fuses are used to repair dynamic random access memory (DRAM) arrays by swapping defective cells with redundant cells. Fuses and anti-fuses can also be used in product configuration, for updating and repairing. Anti-fuse structures include a material that initially has a very high resistance, but after programming by electrical or optical means, the high resistance material is converted to a lower resistance state. Fuse structures that are blown open by electrical or optical means are used to electrically open circuits.
FIG. 1 schematically illustrates a cross section of a prior art anti-fuse structure, which includes a metal-1 layer 14, an anti-fuse layer 16, and an interconnect layer 22 embedded in a dielectric layer 18. Reference numeral 20 denotes a via that is present within the dielectric layer 18. During programming, an appropriate voltage between the metal-1 layer 14 and the interconnect layer 22 is applied and creates a conductive path, i.e., resistance of the anti-fuse structure is lowered after programming. The main drawback of such prior art anti-fuses is that they require voltages in excess of the on-chip power supply voltage to break down the insulating region between two conductors. As operating voltages continue to be scaled down, achieving and controlling sufficient anti-fuse programming voltage is increasingly difficult. Charge pumps are needed to boost the supply voltage to high enough levels to program the anti-fuse, and higher than normal voltage logic circuitry is needed to steer the programming to the desired anti-fuse. However, as both operating voltages and feature sizes continue to be aggressively scaled, the capability of on-chip devices to handle such high voltages without incurring reliability problems is diminished.
Prior art solutions to the anti-fuse programming problem entail the inclusion of special high voltage capable devices on the chip, as well as complex circuits to handle the generation and steering of such voltages. The bottom line is that, as semiconductor technology continues to be scaled down use of prior art anti-fuse technology is increasingly costly and has become an unattractive option.
Electrically blowable fuses, on the other hand, take advantage of the electromigration (EM) effect to open an electrical connection. A two-dimensional dog-bone shape fuse element of the prior art, having a small cross-sectional area between large cathode and anode pads, is shown in FIG. 2. Specifically, FIG. 2 illustrates a top view 28 and a cross sectional view 29 of a fuse structure 30. Fuse structure 30 can form an electrical metal fuse utilized in semiconductor integrated circuit devices. In FIG. 2, a first length L1 of metal structure 34 (i.e., which may be configured from copper) is illustrated. Additionally, a second length L2 of metal structure 36 is also depicted. Metal structure 32 is analogous to metal structure 34 and possesses the same length, L1. Metal structure 36 generally comprises a fuse region formed from a thin metal. At least two different dimensions of single metal lines may be configured to form fuse structure 30, thereby generating increases in current density gradients and thermal gradients thereof. Such dimensional difference is particularly illustrated in cross sectional view 29, in which a height W1 illustrated and a height W4 is also depicted. Height W1 comprises a height that is thinner than height W4. Reference numerals 17, 15 and 19 are Cu regions.
During programming of such a structure, conductive material atoms are moved and leave voids at the center fuse element due to high current density, and eventually create an electrically open circuit. It is also known that electromigration causes the “migrated” conductive material atoms to pile-up and form hillocks at the anode (most positive) end of the fuse element. Hillock formation causes electrical shorts between adjacent interconnects and is an undesirable effect that hasn't been exploited for any useful purpose in the prior art.
Both fuse and anti-fuse elements are essential for advanced DRAM applications, and it is very advantageous to integrate the two elements into a single structure that operates at normal on-chip or readily available voltages. Also, processing for integrating the anti-fuse structures mentioned in the prior art requires novel material for the anti-fuse layer, which increases overall fabrication costs. Furthermore, processing of such novel material requires special consideration to control the thickness of the anti-fuse layer, since the programming voltage for creating the electrical path is a function of this thickness; the anti-fuse material can be damaged by a dielectric over-etch or under-etch, which could lead to programming failure (i.e., the electrical path is not properly formed when an appropriate voltage is applied). Most existing anti-fuse structures have a layer of anti-fuse material sandwiched in between two “disconnected” conductive materials.
There are numerous embodiments of anti-fuses in the prior art, but most require programming voltages higher than the chip supply voltage (Vdd). Thus, there is a need for anti-fuses that can be programmed with readily available on-chip voltages. Most prior art anti-fuses are formed in BEOL metallurgy. However, all require either an anti-fuse material which departs from materials readily available in the standard process, or require special processing considerations, such as extremely tight thickness control of the anti-fuse material. Therefore, there is a need for anti-fuses that can inexpensively be integrated into standard semiconductor processes.
For example, U.S. Pat. No. 6,380,003 to Jahnes et al. discloses the formation of an anti-fuse in BEOL wiring, but requires a special anti-fuse material which departs from standard processing. U.S. Pat. No. 6,251,710 to Radens et al. also requires a special anti-fuse material in BEOL (back-end-of-the-line). U.S. Pat. No. 6,888,215 to Radens et al. is another example of a prior art BEOL anti-fuse requiring a special anti-fuse material.
U.S. Pat. No. 5,793,094 to Sanchez et al. discloses the use of an amorphous silicon anti-fuse element which functions by diffusion of metal into the anti-fuse material from the underlying or overlying BEOL metal wire. The '094 patent states that a low programming voltage is obtained. Upon application of a potential difference between the two metal layers, metal atoms are driven into the amorphous silicon rendering it highly conductive.
U.S. Pat. No. 5,434,432 to Spratt et al. provides an anti-fuse device that includes an anti-fuse material that is separated by a first conductor and a second conductor. The anti-fuse material includes a dopant which raises the band gap and seals off paths in grain boundaries of the anti-fuse material in order to limit leakage current from flowing between the first conductor and the second conductor. When an interconnection is desired, a high voltage pulse is applied across the first conductor and the second conductor to initially break down the anti-fuse material. The breakdown of the anti-fuse material causes a filament to form between the first conductor and the second conductor. The filament creates a conduction path connecting the first conductor and the second conductor electrically together. Additional current is forced through the anti-fuse material to permanently set the filament in order to interconnect circuit elements coupled to the first conductor and the second conductor. This prior art modifies the conductive properties of a semiconducting material and also suffers from the requirement of high programming voltages. Moreover, the anti-fuse disclosed in Spratt et al. requires a special anti-fuse material, which departs from normal semiconductor processing.
U.S. Pat. No. 5,903,041 to La Fleur et al. combines a fuse and an anti-fuse in a single structure. The fuse assists in lowering the resistance of a weakly enabled anti-fuse. After the anti-fuse is fully enabled, the fuse itself is blown and removed from the circuit. The '041 patent provides a two-terminal (between conductors) fuse-anti-fuse structure comprising a vertical anti-fuse portion and a horizontal fuseable link portion. A high voltage is applied across the two terminals to first break down the insulator and program the anti-fuse. Upon shorting the anti-fuse, a relatively high current through the path provided by the programmed anti-fuse then blows the fuseable link. Prior to blowing the fuseable link, the common current through the anti-fuse and fuseable link lowers the resistance of the programmed anti-fuse. An improvement permitting higher current programming of the fuseable link incorporates air gaps which provide pockets of space either above, below or both above and below the fuseable link portion of the device. The air gaps provide a place for material disrupted (melted or vaporized) by the fuseable link. This prior art structure requires a relatively high voltage to program the anti-fuse because the programming mechanism seeks to pass a programming current directly through the anti-fuse material.
In view of the above, a structure including at least one fuse element and at least one anti-fuse element and method of fabrication the same which addresses the above-mentioned concerns and limitations of prior art fuse/anti-fuse structures are needed.